Microchip Technology has announced the release of its Switchtec Gen 6 PCIe switches, which are the first in the industry to use a 3 nanometer process and support PCIe Gen 6. The new switches are designed to address increasing demand for faster data movement and lower latency in artificial intelligence (AI) workloads and high-performance computing applications.
The Switchtec Gen 6 family supports up to 160 lanes for high-density AI system connectivity. It also includes security features such as a hardware root of trust and secure boot, using post-quantum safe cryptography that complies with the Commercial National Security Algorithm Suite (CNSA) 2.0.
Previous generations of PCIe created bandwidth limitations as data moved between CPUs, GPUs, memory, and storage devices. The PCIe 6.0 standard doubles the bandwidth of PCIe 5.0 to 64 GT/s per lane, providing a larger data pipeline for AI accelerators. Microchip’s new switches enable high-speed connections among CPUs, GPUs, SoCs, AI accelerators, and storage devices.
Brian McCarson, corporate vice president of Microchip’s data center solutions business unit, said: “Rapid innovation in the AI era is prompting data center architectures to move away from traditional designs and shift to a model where components are organized as a pool of shared resources. By expanding our proven Switchtec product line to PCIe 6.0, we’re enabling this transformation with technology that facilitates direct communication between critical compute resources and delivers the most powerful and energy efficient switch we’ve ever produced.”
The switches provide more direct interfaces between GPUs within server racks, helping reduce signal loss and maintain low latency required by AI systems. New features in PCIe 6.0 include Flow Control Unit (FLIT) mode, Forward Error Correction (FEC), and dynamic resource allocation for more efficient data transfer—especially beneficial for small packets common in AI tasks.
Switchtec Gen 6 switches have 20 ports across 10 stacks; each port includes hot- and surprise-plug controllers. Additional capabilities include Non-Transparent Bridging (NTB) for connecting multiple host domains and multicast support for distributing data within one domain. The design incorporates advanced error containment measures along with diagnostic tools.
Development tools available for these switches include Microchip’s ChipLink diagnostic suite with an intuitive graphical interface supporting various connection methods during both design and deployment phases. An evaluation kit is also offered for customers interested in testing or developing around the new hardware.
Switchtec Gen 6 PCIe switches are currently available as samples to qualified customers through Microchip sales representatives or authorized distributors.
Microchip Technology is headquartered in Chandler, Arizona, serving markets including industrial, automotive, consumer electronics, aerospace and defense communications, as well as computing sectors.
